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FPL
2004
Springer
112views Hardware» more  FPL 2004»
14 years 4 months ago
Automating the Layout of Reconfigurable Subsystems via Template Reduction
When designing SoCs, a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be used. The inclusion o...
Shawn Phillips, Akshay Sharma, Scott Hauck
TWC
2008
129views more  TWC 2008»
13 years 10 months ago
Adaptive Minimum Symbol Error Rate Beamforming Assisted Detection for Quadrature Amplitude Modulation
We consider beamforming assisted detection for multiple antenna aided multiuser systems that employ the bandwidth efficient quadrature amplitude modulation scheme. A minimum symbol...
Sheng Chen, Andy Livingstone, H.-Q. Du, Lajos Hanz...
DAC
2008
ACM
14 years 11 months ago
Driver waveform computation for timing analysis with multiple voltage threshold driver models
This paper introduces an accurate and efficient electrical analysis of logic gates modeled as Multiple Voltage Threshold Models (MVTM) loaded by the associated interconnect. MVTMs...
Peter Feldmann, Soroush Abbaspour, Debjit Sinha, G...
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
14 years 2 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
ERSHOV
1989
Springer
14 years 2 months ago
Experiments with Implementations of Two Theoretical Constructions
This paper reports two experiments with implementations of constructions from theoretical computer science. The first one deals with Kleene’s and Rogers’ second recursion the...
Torben Amtoft Hansen, Thomas Nikolajsen, Jesper La...