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CODES
2005
IEEE
15 years 10 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
STOC
2003
ACM
188views Algorithms» more  STOC 2003»
16 years 5 months ago
Almost random graphs with simple hash functions
We describe a simple randomized construction for generating pairs of hash functions h1, h2 from a universe U to ranges V = [m] = {0, 1, . . . , m - 1} and W = [m] so that for ever...
Martin Dietzfelbinger, Philipp Woelfel
136
Voted
RTSS
2009
IEEE
15 years 11 months ago
On the Scheduling of Mixed-Criticality Real-Time Task Sets
Abstract—The functional consolidation induced by the costreduction trends in embedded systems can force tasks of different criticality (e.g. ABS Brakes with DVD) to share a proce...
Dionisio de Niz, Karthik Lakshmanan, Ragunathan Ra...
BMCBI
2010
243views more  BMCBI 2010»
15 years 4 months ago
Comparative study of unsupervised dimension reduction techniques for the visualization of microarray gene expression data
Background: Visualization of DNA microarray data in two or three dimensional spaces is an important exploratory analysis step in order to detect quality issues or to generate new ...
Christoph Bartenhagen, Hans-Ulrich Klein, Christia...
CIKM
2011
Springer
14 years 4 months ago
Citation count prediction: learning to estimate future citations for literature
In most of the cases, scientists depend on previous literature which is relevant to their research fields for developing new ideas. However, it is not wise, nor possible, to trac...
Rui Yan, Jie Tang, Xiaobing Liu, Dongdong Shan, Xi...