Sciweavers

487 search results - page 8 / 98
» Using a Genetic Algorithm to Design and Improve Storage Area...
Sort
View
DSD
2010
IEEE
140views Hardware» more  DSD 2010»
13 years 8 months ago
Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications
—Although many efficient high-level algorithms have been proposed for the realization of Multiple Constant Multiplications (MCM) using the fewest number of addition and subtract...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...
PDPTA
2004
13 years 10 months ago
An Evaluation of Distributed Scheduling Algorithms Within the DESPOT Architecture
Current systems for managing workload on clusters of workstations, particularly those available for Linuxbased (Beowulf) clusters, are typically based on traditional process-based...
Daniel Andresen, Jeffrey Lebak, Ethan Bowker
DAC
2011
ACM
12 years 8 months ago
Rethinking memory redundancy: optimal bit cell repair for maximum-information storage
SRAM design has been a major challenge for nanoscale manufacturing technology. We propose a new bit cell repair scheme for designing maximum-information memory system (MIMS). Unli...
Xin Li
GECCO
2000
Springer
168views Optimization» more  GECCO 2000»
14 years 5 days ago
A Fault-tolerant Multicast Routing Algorithm in ATM Networks
This paper presents a genetic algorithm based method to solve the capacity and routing assignment problem arising in the design of selfhealing networks using the Virtual Path (VP)...
Sam Kwong, S. S. Chan
FPGA
2004
ACM
163views FPGA» more  FPGA 2004»
14 years 9 days ago
Time and area efficient pattern matching on FPGAs
Pattern matching for network security and intrusion detection demands exceptionally high performance. Much work has been done in this field, and yet there is still significant roo...
Zachary K. Baker, Viktor K. Prasanna