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HPCA
2008
IEEE
14 years 7 months ago
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
14 years 23 days ago
Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
ICCS
2003
Springer
13 years 12 months ago
A Performance Prediction Framework for Scientific Applications
This work presents a performance modeling framework, developed by the Performance Modeling and Characterization (PMaC) Lab at the San Diego Supercomputer Center, that is faster tha...
Laura Carrington, Allan Snavely, Xiaofeng Gao, Nic...
WSC
1997
13 years 8 months ago
Efficient Instruction Cache Simulation and Execution Profiling with a Threaded-Code Interpreter
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
Peter S. Magnusson
ARC
2011
Springer
220views Hardware» more  ARC 2011»
13 years 1 months ago
From Plasma to BeeFarm: Design Experience of an FPGA-Based Multicore Prototype
Abstract. In this paper, we take a MIPS-based open-source uniprocessor soft core, Plasma, and extend it to obtain the Beefarm infrastructure for FPGA-based multiprocessor emulation...
Nehir Sönmez, Oriol Arcas, Gokhan Sayilar, Os...