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IEEEPACT
2008
IEEE
14 years 1 months ago
Meeting points: using thread criticality to adapt multicore hardware to parallel regions
We present a novel mechanism, called meeting point thread characterization, to dynamically detect critical threads in a parallel region. We define the critical thread the one with...
Qiong Cai, José González, Ryan Rakvi...
DATE
2007
IEEE
89views Hardware» more  DATE 2007»
14 years 1 months ago
Computing synchronizer failure probabilities
— System-on-Chip designs often have a large number of timing domains. Communication between these domains requires synchronization, and the failure probabilities of these synchro...
Suwen Yang, Mark R. Greenstreet
ISCA
1995
IEEE
98views Hardware» more  ISCA 1995»
13 years 10 months ago
Instruction Fetching: Coping with Code Bloat
Previous research has shown that the SPEC benchmarks achieve low miss ratios in relatively small instruction caches. This paper presents evidence that current software-development...
Richard Uhlig, David Nagle, Trevor N. Mudge, Stuar...
ISPASS
2010
IEEE
14 years 1 months ago
Synthesizing memory-level parallelism aware miniature clones for SPEC CPU2006 and ImplantBench workloads
Abstract—We generate and provide miniature synthetic benchmark clones for modern workloads to solve two pre-silicon design challenges, namely: 1) huge simulation time (weeks to m...
Karthik Ganesan, Jungho Jo, Lizy K. John
ICCD
2002
IEEE
130views Hardware» more  ICCD 2002»
14 years 3 months ago
Branch Behavior of a Commercial OLTP Workload on Intel IA32 Processors
This paper presents a detailed branch characterization of an Oracle based commercial on-line transaction processing workload, Oracle Database Benchmark (ODB), running on an IA32 p...
Murali Annavaram, Trung A. Diep, John Paul Shen