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FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 7 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
PLDI
2010
ACM
14 years 17 days ago
A GPGPU compiler for memory optimization and parallelism management
This paper presents a novel optimizing compiler for general purpose computation on graphics processing units (GPGPU). It addresses two major challenges of developing high performa...
Yi Yang, Ping Xiang, Jingfei Kong, Huiyang Zhou
DAC
2003
ACM
14 years 8 months ago
Behavioral consistency of C and verilog programs using bounded model checking
We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program ...
Edmund M. Clarke, Daniel Kroening, Karen Yorav
DAC
1994
ACM
13 years 11 months ago
Optimum Functional Decomposition Using Encoding
In this paper, we revisit the classical problem of functional decomposition [1, 2] that arises so often in logic synthesis. One basic problem that has remained largely unaddressed...
Rajeev Murgai, Robert K. Brayton, Alberto L. Sangi...
CORR
2007
Springer
120views Education» more  CORR 2007»
13 years 7 months ago
On the Feedback Capacity of Power Constrained Gaussian Noise Channels with Memory
—For a stationary additive Gaussian-noise channel with a rational noise power spectrum of a finite-order L, we derive two new results for the feedback capacity under an average ...
Shaohua Yang, Aleksandar Kavcic, Sekhar Tatikonda