102 search results - page 18 / 21 » Using embedded FPGAs for SoC yield improvement |
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
RTAS
1999
IEEE
13 years 11 months ago
1999
IEEE
We present a QoS management framework that enables us to quantitatively measure QoS, and to analytically plan and allocate resources. In this model, end users' quality prefer...
ISLPED
2003
ACM
14 years 19 days ago
2003
ACM
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
— In this paper we present the Collaborative Routing Architecture (CRA), a routing architecture specially designed to achieve high efficiency in hardware and competitive delay p...
SIAMCOMP
2010
13 years 2 months ago
2010
In the first part of the paper, we reexamine the all-pairs shortest paths (APSP) problem and present a new algorithm with running time O(n3 log3 log n/ log2 n), which improves all...