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» Using the Compiler to Improve Cache Replacement Decisions
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ASPLOS
1998
ACM
13 years 12 months ago
Cache-Conscious Data Placement
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...
Brad Calder, Chandra Krintz, Simmi John, Todd M. A...
MICRO
2003
IEEE
147views Hardware» more  MICRO 2003»
14 years 28 days ago
Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
Enric Gibert, F. Jesús Sánchez, Anto...
CODES
2009
IEEE
14 years 11 days ago
MinDeg: a performance-guided replacement policy for run-time reconfigurable accelerators
Reconfigurable Processors utilize a reconfigurable fabric (to implement application-specific accelerators) and may perform runtime reconfigurations to exchange the set of deployed...
Lars Bauer, Muhammad Shafique, Jörg Henkel
DAC
2010
ACM
13 years 7 months ago
Instruction cache locking using temporal reuse profile
The performance of most embedded systems is critically dependent on the average memory access latency. Improving the cache hit rate can have significant positive impact on the per...
Yun Liang, Tulika Mitra
CF
2005
ACM
13 years 9 months ago
A case for a working-set-based memory hierarchy
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...
Steve Carr, Soner Önder