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» Using the DEVS Paradigm to Implement a Simulated Processor
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ADAEUROPE
2010
Springer
14 years 1 months ago
AdaStreams: A Type-Based Programming Extension for Stream-Parallelism with Ada 2005
Because multicore CPUs have become the standard with all major hardware manufacturers, it becomes increasingly important for ing languages to provide programming abstractions that ...
Gingun Hong, Kirak Hong, Bernd Burgstaller, Johann...
CONCURRENCY
2010
110views more  CONCURRENCY 2010»
13 years 9 months ago
Redesigning the message logging model for high performance
Over the past decade the number of processors in the high performance facilities went up to hundreds of thousands. As a direct consequence, while the computational power follow th...
Aurelien Bouteiller, George Bosilca, Jack Dongarra
SC
2004
ACM
14 years 2 months ago
Analysis and Performance Results of a Molecular Modeling Application on Merrimac
The Merrimac supercomputer uses stream processors and a highradix network to achieve high performance at low cost and low power. The stream architecture matches the capabilities o...
Mattan Erez, Jung Ho Ahn, Ankit Garg, William J. D...
ICCD
2006
IEEE
275views Hardware» more  ICCD 2006»
14 years 5 months ago
Split-Row: A Reduced Complexity, High Throughput LDPC Decoder Architecture
— A reduced complexity LDPC decoding method is presented that dramatically reduces wire interconnect complexity, which is a major issue in LDPC decoders. The proposed Split-Row m...
Tinoosh Mohsenin, Bevan M. Baas
DSD
2003
IEEE
121views Hardware» more  DSD 2003»
14 years 2 months ago
CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors
With shrinking feature size of silicon fabrication technology, architects are putting more and more logic into a single die. While one might opt to use these transistors for build...
Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemi...