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» Using the DEVS Paradigm to Implement a Simulated Processor
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HIPC
2004
Springer
14 years 28 days ago
Lock-Free Parallel Algorithms: An Experimental Study
Abstract. Lock-free shared data structures in the setting of distributed computing have received a fair amount of attention. Major motivations of lock-free data structures include ...
Guojing Cong, David A. Bader
ISCA
2002
IEEE
95views Hardware» more  ISCA 2002»
14 years 14 days ago
An Instruction Set and Microarchitecture for Instruction Level Distributed Processing
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
Ho-Seop Kim, James E. Smith
ISQED
2002
IEEE
137views Hardware» more  ISQED 2002»
14 years 14 days ago
A Comprehensive Layout Methodology and Layout-Specific Circuit Analyses for Three-Dimensional Integrated Circuits
In this paper, we describe a comprehensive layout methodology for bonded three-dimensional integrated circuits (3D ICs). In bonded 3D integration technology, parts of a circuit ar...
Syed M. Alam, Donald E. Troxel, Carl V. Thompson
ICCD
1999
IEEE
136views Hardware» more  ICCD 1999»
13 years 12 months ago
ActiveOS: Virtualizing Intelligent Memory
Current trends in DRAM memory chip fabrication have led many researchers to propose \intelligent memory" architectures that integrate microprocessors or logic with memory. Su...
Mark Oskin, Frederic T. Chong, Timothy Sherwood
ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
13 years 11 months ago
Mixed-clock issue queue design for energy aware, high-performance cores
- Globally-Asynchronous, Locally-Synchronous (GALS) design style has started to gain interest recently as a possible solution to the increased design complexity, power and thermal ...
Venkata Syam P. Rapaka, Emil Talpes, Diana Marcule...