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» Using the DEVS Paradigm to Implement a Simulated Processor
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ISLPED
2005
ACM
90views Hardware» more  ISLPED 2005»
14 years 1 months ago
Power and thermal effects of SRAM vs. Latch-Mux design styles and clock gating choices
This paper studies the impact on energy efficiency and thermal behavior of design style and clock-gating style in queue and array structures. These structures are major sources of...
Yingmin Li, Mark Hempstead, Patrick Mauro, David B...
PPL
2008
185views more  PPL 2008»
13 years 7 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
CODES
2006
IEEE
14 years 1 months ago
Fuzzy decision making in embedded system design
The use of Application Specific Instruction-set Processors (ASIP) is a solution to the problem of increasing complexity in embedded systems design. One of the major challenges in...
Alessandro G. Di Nuovo, Maurizio Palesi, Davide Pa...
ADHOC
2006
97views more  ADHOC 2006»
13 years 7 months ago
A probabilistic algorithm for efficient and robust data propagation in wireless sensor networks
We study the problem of data propagation in sensor networks, comprised of a large number of very small and low-cost nodes, capable of sensing, communicating and computing. The dis...
Ioannis Chatzigiannakis, Tassos Dimitriou, Sotiris...
ISCA
2006
IEEE
182views Hardware» more  ISCA 2006»
14 years 1 months ago
Cooperative Caching for Chip Multiprocessors
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...
Jichuan Chang, Gurindar S. Sohi