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» Using the DEVS Paradigm to Implement a Simulated Processor
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ASPLOS
2009
ACM
14 years 8 months ago
Capo: a software-hardware interface for practical deterministic multiprocessor replay
While deterministic replay of parallel programs is a powerful technique, current proposals have shortcomings. Specifically, software-based replay systems have high overheads on mu...
Pablo Montesinos, Matthew Hicks, Samuel T. King, J...
ASPLOS
2010
ACM
14 years 2 months ago
ParaLog: enabling and accelerating online parallel monitoring of multithreaded applications
Instruction-grain lifeguards monitor the events of a running application at the level of individual instructions in order to identify and help mitigate application bugs and securi...
Evangelos Vlachos, Michelle L. Goodstein, Michael ...
IEEEPACT
2008
IEEE
14 years 1 months ago
Scalable and reliable communication for hardware transactional memory
In a hardware transactional memory system with lazy versioning and lazy conflict detection, the process of transaction commit can emerge as a bottleneck. This is especially true ...
Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen ...
CODES
2007
IEEE
14 years 1 months ago
HW/SW co-design for Esterel processing
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
Sascha Gädtke, Claus Traulsen, Reinhard von H...
CODES
2005
IEEE
14 years 1 months ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...