598 search results - page 21 / 120 » VLSI Implementation of Neural Networks |
ANNS
2010
13 years 2 months ago
2010
Evolving recurrent neural networks for behavior control of robots equipped with larger sets of sensors and actuators is difficult due to the large search spaces that come with the ...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
IJCAI
1997
13 years 9 months ago
1997
This paper describes an evolvable hardware (EHW) system for generalized neural network learning. We have developed an ASIC VLSI chip, which is a building block to configure a scal...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract- We present an architecture and VLSI implemen- Various strategies in the analysis of spatio-temporal dynamtation of a distributed neural interface and spatio-temporal ics ...
FPGA
1997
ACM
13 years 11 months ago
1997
ACM
Event identification in photon counting ICCD detectors requires a high level image analysis which cannot be easily described algorithmically: neural networks are promising to appr...