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» VLSI Implementation of Neural Networks
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NN
2008
Springer
163views Neural Networks» more  NN 2008»
13 years 7 months ago
Central pattern generators for locomotion control in animals and robots: A review
The problem of controlling locomotion is an area in which neuroscience and robotics can fruitfully interact. In this article, I will review research carried out on locomotor centr...
Auke Jan Ijspeert
GLVLSI
2009
IEEE
132views VLSI» more  GLVLSI 2009»
14 years 2 months ago
Multicast routing with dynamic packet fragmentation
Networks-on-Chip (NoCs) become a critical design factor as chip multiprocessors (CMPs) and systems on a chip (SoCs) scale up with technology. With fundamental benefits of high ban...
Young Hoon Kang, Jeff Sondeen, Jeffrey T. Draper
ICPP
1999
IEEE
14 years 1 days ago
Adaptive Bubble Router: A Design to Improve Performance in Torus Networks
A router design for torus networks that significantly reduces message latency over traditional wormhole routers is presented in this paper. This new router implements virtual cut-...
Valentin Puente, Ramón Beivide, José...
JPDC
2006
134views more  JPDC 2006»
13 years 7 months ago
Fast shared-memory algorithms for computing the minimum spanning forest of sparse graphs
Minimum Spanning Tree (MST) is one of the most studied combinatorial problems with practical applications in VLSI layout, wireless communication, and distributed networks, recent ...
David A. Bader, Guojing Cong
FCCM
2008
IEEE
176views VLSI» more  FCCM 2008»
13 years 8 months ago
The Effectiveness of Configuration Merging in Point-to-Point Networks for Module-based FPGA Reconfiguration
Communications infrastructure for modular reconfiguration of FPGAs needs to support the changing communications interfaces of a sequence of modules. In order to avoid the overhead...
Shannon Koh, Oliver Diessel