In this paper, a fully functional prototype of an asynchronous 4-to-4 Address Event Representation (AER) mapper is presented. AER is an event driven communication protocol original...
A VLSI implementation of a programmable router schemefor parallel interconnectionnetwork architectures is presented in this paper. The router executes routing
This paper presents configuration methods for an existing neuromorphic hardware and shows first experimental results. The utilized mixed-signal VLSI1 device implements a highly a...
Optical ow elds are a primary source of information about the visual scene in technical and biological systems. In a step towards a system for real time scene analysis we have deve...
Rainer A. Deutschmann, Charles M. Higgins, Christo...
The implementation of larger digital neural networks has not been possible due to the real-estate requirements of single neurons. We present an expandable digital architecture whic...
Valentina Salapura, Michael Gschwind, Oliver Maisc...