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» VPR: A new packing, placement and routing tool for FPGA rese...
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FPL
1997
Springer
125views Hardware» more  FPL 1997»
14 years 3 months ago
VPR: A new packing, placement and routing tool for FPGA research
We describe the capabilities of and algorithms used in a new FPGA CAD tool, Versatile Place and Route (VPR). In terms of minimizing routing area, VPR outperforms all published FPG...
Vaughn Betz, Jonathan Rose
DAC
2006
ACM
14 years 12 months ago
Architecture-aware FPGA placement using metric embedding
Since performance on FPGAs is dominated by the routing architecture rather than wirelength, we propose a new architecture-aware approach to initial FPGA placement that models the ...
Padmini Gopalakrishnan, Xin Li, Lawrence T. Pilegg...
FPGA
2010
ACM
359views FPGA» more  FPGA 2010»
14 years 7 months ago
Towards scalable placement for FPGAs
Placement based on simulated annealing is in dominant use in the FPGA community due to its superior quality of result (QoR). However, given the progression of FPGA device capacity...
Huimin Bian, Andrew C. Ling, Alexander Choong, Jia...
FPGA
2003
ACM
138views FPGA» more  FPGA 2003»
14 years 4 months ago
Automatic transistor and physical design of FPGA tiles from an architectural specification
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron E...