428 search results - page 16 / 86 » Validating High-Level Synthesis |
JNIT
2010
13 years 5 months ago
2010
MTV
2005
IEEE
14 years 4 months ago
2005
IEEE
Our mutation based validation paradigm (MVP) is a validation environment for high-level microprocessor implementations. To be able to efficiently identify and analyze the architec...
ICCD
2001
IEEE
14 years 7 months ago
2001
IEEE
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
EVOW
2001
Springer
14 years 3 months ago
2001
Springer
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
IPPS
2006
IEEE
14 years 5 months ago
2006
IEEE
Current electronic system design requires to be concerned with power consumption consideration. However, in a lot of design tools, the application power consumption budget is esti...