30 search results - page 1 / 6 » Variability in nanometer CMOS: Impact, analysis, and minimiz... |
INTEGRATION
2008
13 years 11 months ago
2008
Variation is a significant concern in nanometer-scale CMOS due to manufacturing equipment being pushed to fundamental limits, particularly in lithography. In this paper, we review...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Nanometer CMOS scaling has resulted in greatly increased circuit variability, with extremely adverse consequences on design predictability and yield. A number of recent works have...
ISLPED
2009
ACM
14 years 5 months ago
2009
ACM
In this paper, we observe that minimum energy Emin of subthreshold logic dramatically increases when reaching 45 nm node. We demonstrate by circuit simulation and analytical model...
DT
2006
13 years 11 months ago
2006
The ITRS (International Technology Roadmap for Semiconductors) predicts aggressive scaling down of device size, transistor threshold voltage and oxide thickness to meet growing de...
ASPDAC
2007
ACM
14 years 2 months ago
2007
ACM
The scaling of CMOS technology into the nanometer era enables the fabrication of highly integrated systems, which increasingly contain analog and/or RF parts. However, scaling into...