148 search results - page 17 / 30 » Variation-aware dynamic voltage frequency scaling |
ICCD
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper presents a novel power reduction method for chip multi-processors (CMPs) under real-time constraints. While the power consumption of processing units (PUs) on CMPs can ...
GLVLSI
2010
IEEE
13 years 7 months ago
2010
IEEE
Relentless CMOS scaling coupled with lower design tolerances is making ICs increasingly susceptible to wear-out related permanent faults and transient faults, necessitating on-chi...
SC
2005
ACM
14 years 1 months ago
2005
ACM
For decades, the high-performance computing (HPC) community has focused on performance, where performance is defined as speed. To achieve better performance per compute node, mic...
LCTRTS
2007
Springer
14 years 1 months ago
2007
Springer
Energy efficiency is an important factor in embedded systems design. We consider an embedded system with a dynamic voltage scaling (DVS) capable processor and its system-wide pow...
ISQED
2010
IEEE
13 years 9 months ago
2010
IEEE
- In a multi-core system, power and performance may be dynamically traded off by utilizing power management (PM). This paper addresses the problem of minimizing the total power con...