226 search results - page 28 / 46 » Variation-tolerant circuits: circuit solutions and technique... |
DATE
2009
IEEE
14 years 9 days ago
2009
IEEE
Growing test data volume and overtesting caused by excessive scan capture power are two of the major concerns for the industry when testing large integrated circuits. Various test...
ET
2002
13 years 8 months ago
2002
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
ICCAD
1997
IEEE
14 years 19 days ago
1997
IEEE
Interconnect has become the dominating factor in determining circuit performance and reliability in deep submicron designs. In this embedded tutorial, we first discuss the trends...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
We present a low-cost on-line system for clock skew management in integrated circuits. Our Built-In Clock Skew System (BICSS) uses a centralized approach to identify, quantify and...
INFOCOM
1997
IEEE
14 years 19 days ago
1997
IEEE
Due to the increasing reliance of our society on the timely and reliable transfer of large quantities of information (suchas voice, data, and video)across high speed communication...