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HIPEAC
2009
Springer
14 years 3 months ago
Adapting Application Mapping to Systematic Within-Die Process Variations on Chip Multiprocessors
Process variations, which lead to timing and power variations across identically-designed components, have been identified as one of the key future design challenges by the semico...
Yang Ding, Mahmut T. Kandemir, Mary Jane Irwin, Pa...
ISPD
2006
ACM
90views Hardware» more  ISPD 2006»
14 years 2 months ago
Fast buffer insertion considering process variations
Advanced process technologies call for a proactive consideration of process variations in design to ensure high parametric timing yield. Despite of its popular use in almost any h...
Jinjun Xiong, Lei He
DAC
2008
ACM
14 years 9 months ago
Statistical modeling and simulation of threshold variation under dopant fluctuations and line-edge roughness
The threshold voltage (Vth) of a nanoscale transistor is severely affected by random dopant fluctuations and line-edge roughness. The analysis of these effects usually requires at...
Yun Ye, Frank Liu, Sani R. Nassif, Yu Cao
ICCD
2007
IEEE
322views Hardware» more  ICCD 2007»
14 years 5 months ago
Voltage drop reduction for on-chip power delivery considering leakage current variations
In this paper, we propose a novel on-chip voltage drop reduction technique for on-chip power delivery networks of VLSI systems in the presence of variational leakage current sourc...
Jeffrey Fan, Ning Mi, Sheldon X.-D. Tan
BMCBI
2008
145views more  BMCBI 2008»
13 years 9 months ago
Mapping gene expression quantitative trait loci by singular value decomposition and independent component analysis
Background: The combination of gene expression profiling with linkage analysis has become a powerful paradigm for mapping gene expression quantitative trait loci (eQTL). To date, ...
Shameek Biswas, John D. Storey, Joshua M. Akey