399 search results - page 31 / 80 » Verification of System Level Model Transformations |
135
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AOSD
2009
ACM
15 years 9 months ago
2009
ACM
e is an aspect-oriented hardware verification language that is widely used to verify the design of electronic circuits through the development and execution of testbenches. In rec...
161
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FMCAD
2006
Springer
15 years 6 months ago
2006
Springer
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
109
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DATE
2003
IEEE
15 years 7 months ago
2003
IEEE
The ForSyDe methodology has been developed for system level design. Starting with a formal specification model, that captures the functionality of the system at a high abstractio...
143
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DAC
2003
ACM
16 years 3 months ago
2003
ACM
In the Artemis project [13], design space exploration of embedded systems is provided by modeling application behavior and architectural performance constraints separately. Mappin...
129
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FAC
2000
15 years 2 months ago
2000
Formal approaches to the design of interactive systems rely on reasoning about properties of the t a very high level of abstraction. Specifications to support such an approach typi...