304 search results - page 32 / 61 » Verification of Timed Systems Using POSETs |
VMCAI
2010
Springer
14 years 4 months ago
2010
Springer
In the recent years, there have been a large amount of investigations on safety verification of uncertain continuous systems. In engineering and applied mathematics, this verificat...
CHI
2010
ACM
14 years 21 days ago
2010
ACM
Both handwriting recognition systems and their users are error prone. Handwriting recognizers make recognition errors, and users may miss those errors when verifying output. As a ...
DAC
2004
ACM
13 years 11 months ago
2004
ACM
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
SP
2000
IEEE
13 years 11 months ago
2000
IEEE
Nested certification is a methodology for efficient certificate path verification. Nested certificates can be used together with classical certificates in the Public Key Infrastru...
DAC
2010
ACM
13 years 10 months ago
2010
ACM
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...