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» Verification of Timed Systems Using POSETs
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DAC
2004
ACM
14 years 8 months ago
Abstraction of assembler programs for symbolic worst case execution time analysis
ion of Assembler Programs for Symbolic Worst Case Execution Time Analysis Tobias Schuele Tobias.Schuele@informatik.uni-kl.de Klaus Schneider Klaus.Schneider@informatik.uni-kl.de Re...
Klaus Schneider, Tobias Schüle
CODES
2004
IEEE
13 years 11 months ago
RTOS-centric hardware/software cosimulator for embedded system design
This paper presents an RTOS-centric hardwareisoftware cosimulator which we have developed for embedded system design. One of the most remarkable features in our cosimulator is tha...
Shinya Honda, Takayuki Wakabayashi, Hiroyuki Tomiy...
HPDC
2010
IEEE
13 years 8 months ago
Mendel: efficiently verifying the lineage of data modified in multiple trust domains
Data is routinely created, disseminated, and processed in distributed systems that span multiple administrative domains. To maintain accountability while the data is transformed b...
Ashish Gehani, Minyoung Kim
CUZA
2002
132views more  CUZA 2002»
13 years 7 months ago
A Process Algebra for Predictible Control Systems
This paper presents Process Algebra for Predictible Control Systems (PAPCS) as a model for specifying and analysis of concurrent, time and resource dependent, distributed control s...
Nicolae Marian
DATE
2004
IEEE
138views Hardware» more  DATE 2004»
13 years 11 months ago
Microarchitecture Development via Metropolis Successive Platform Refinement
Productivity data for IC designs indicates an exponential increase in design time and cost with the number of elements that are to be included in a device. Present applications re...
Douglas Densmore, Sanjay Rekhi, Alberto L. Sangiov...