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FPGA
1999
ACM
142views FPGA» more  FPGA 1999»
14 years 10 days ago
Multi-Terminal Net Routing for Partial Crossbar-Based Multi-FPGA Systems
Multi-FPGA systems are used as custom computing machines to solve compute intensive problems and also in the verification and prototyping of large circuits. In this paper, we addr...
Abdel Ejnioui, N. Ranganathan
ISSRE
2010
IEEE
13 years 6 months ago
Automata-Based Verification of Security Requirements of Composite Web Services
— With the increasing reliance of complex real-world applications on composite web services assembled from independently developed component services, there is a growing need for...
Hongyu Sun, Samik Basu, Vasant Honavar, Robyn R. L...
IESS
2007
Springer
120views Hardware» more  IESS 2007»
14 years 2 months ago
Error Containment in the Time-Triggered System-On-a-Chip Architecture
Abstract: The time-triggered System-on-a-Chip (SoC) architecture provides a generic multicore system platform for a family of composable and dependable giga-scale SoCs. It supports...
Roman Obermaisser, Hermann Kopetz, Christian El Sa...
RSP
2000
IEEE
156views Control Systems» more  RSP 2000»
14 years 13 days ago
Quasi-Static Scheduling of Reconfigurable Dataflow Graphs for DSP Systems
Dataflow programming has proven to be popular for representing applications in rapid prototyping tools for digital signal processing (DSP); however, existing dataflow design tools...
Bishnupriya Bhattacharya, Shuvra S. Bhattacharyya
DATE
2008
IEEE
167views Hardware» more  DATE 2008»
14 years 2 months ago
Accuracy-Adaptive Simulation of Transaction Level Models
Simulation of transaction level models (TLMs) is an established embedded systems design technique. Its use cases include virtual prototyping for early software development, platfo...
Martin Radetzki, Rauf Salimi Khaligh