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» Verification-Aware Microprocessor Design
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ASPDAC
2008
ACM
98views Hardware» more  ASPDAC 2008»
13 years 10 months ago
A unified methodology for power supply noise reduction in modern microarchitecture design
In this paper, we present a novel design methodology to combat the ever-aggravating high frequency power supply noise (di/dt) in modern microprocessors. Our methodology integrates ...
Michael B. Healy, Fayez Mohamood, Hsien-Hsin S. Le...
MSS
2000
IEEE
130views Hardware» more  MSS 2000»
13 years 11 months ago
Design for a Decentralized Security System For Network Attached Storage
T This paper describes an architecture for a secure file system based on network-attached storage that guarantees end-to-end encryption for all user data. We describe the design of...
William E. Freeman, Ethan L. Miller
SLIP
2004
ACM
14 years 1 months ago
Interconnect-power dissipation in a microprocessor
Interconnect power is dynamic power dissipation due to switching of interconnection capacitances. This paper describes the characterization of interconnect power in a state-of-the...
Nir Magen, Avinoam Kolodny, Uri C. Weiser, Nachum ...
DAC
1998
ACM
14 years 9 months ago
Reducing Power in High-Performance Microprocessors
Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is ...
Vivek Tiwari, Deo Singh, Suresh Rajgopal, Gaurav M...
DAC
1999
ACM
14 years 9 months ago
Verification of a Microprocessor Using Real World Applications
You-Sung Chang, Seungjong Lee, In-Cheol Park, Chon...