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» Verification-Aware Microprocessor Design
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DAC
2001
ACM
14 years 9 months ago
Scalable Hybrid Verification of Complex Microprocessors
Maher N. Mneimneh, Fadi A. Aloul, Christopher T. W...
GLVLSI
1999
IEEE
88views VLSI» more  GLVLSI 1999»
14 years 7 days ago
Logic in Wire: Using Quantum Dots to Implement a Microprocessor
Despite the seemingly endless upwards spiral of modern VLSI technology, many experts are predicting a hard wall for CMOS in about a decade. Given this, researchers continue to loo...
Michael T. Niemier, Peter M. Kogge
CF
2005
ACM
13 years 10 months ago
An efficient wakeup design for energy reduction in high-performance superscalar processors
In modern superscalar processors, the complex instruction scheduler could form the critical path of the pipeline stages and limit the clock cycle time. In addition, complex schedu...
Kuo-Su Hsiao, Chung-Ho Chen
MICRO
1999
IEEE
105views Hardware» more  MICRO 1999»
14 years 6 days ago
DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...
Todd M. Austin