Sciweavers

584 search results - page 46 / 117
» Verification-Aware Microprocessor Design
Sort
View
ICCAD
2009
IEEE
106views Hardware» more  ICCAD 2009»
13 years 5 months ago
Quantifying robustness metrics in parameterized static timing analysis
Process and environmental variations continue to present significant challenges to designers of high-performance integrated circuits. In the past few years, while much research has...
Khaled R. Heloue, Chandramouli V. Kashyap, Farid N...
DAC
1999
ACM
14 years 8 months ago
A Low Power Hardware/Software Partitioning Approach for Core-Based Embedded Systems
We present a novel approach that minimizes the power consumption of embedded core-based systems through hardware/software partitioning. Our approach is based on the idea of mapping...
Jörg Henkel
ICCAD
2002
IEEE
154views Hardware» more  ICCAD 2002»
14 years 4 months ago
Concurrent flip-flop and repeater insertion for high performance integrated circuits
For many years, CMOS process scaling has allowed a steady increase in the operating frequency and integration density of integrated circuits. Only recently, however, have we reach...
Pasquale Cocchini
DSN
2008
IEEE
14 years 2 months ago
Analysis and solutions to issue queue process variation
The last few years have witnessed an unprecedented explosion in transistor densities. Diminutive feature sizes have enabled microprocessor designers to break the billion-transisto...
Niranjan Soundararajan, Aditya Yanamandra, Chrysos...
CODES
1996
IEEE
14 years 1 days ago
Uninterpreted Co-Simulation for Performance Evaluation of Hw/Sw Systems
Performance modeling and evaluation of embedded hardware/software systems is important to help the CoDesign process. The hardware/software partitioning needs to be evaluated befor...
Jean Paul Calvez, Dominique Heller, Olivier Pasqui...