584 search results - page 61 / 117 » Verification-Aware Microprocessor Design |
ISSS
2002
IEEE
14 years 23 days ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
ICCAD
1999
IEEE
14 years 4 days ago
1999
IEEE
In Deep Sub-Micron (DSM) designs, performance will depend critically on the latency of long wires. We propose a new synthesis methodology for synchronous systems that makes the de...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Correctness is a paramount attribute of any microprocessor design; however, without novel technologies to tame the increasing complexity of design verification, the amount of bugs...
ESTIMEDIA
2004
Springer
14 years 1 months ago
2004
Springer
— Workload design is a well recognized problem in the domain of microprocessor design. Different program characteristics that influence the selection of a representative workloa...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...