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TVLSI
2002
84views more  TVLSI 2002»
13 years 8 months ago
Application of instruction analysis/scheduling techniques to resource allocation of superscalar processors
This paper presents the development of instruction analysis/scheduling CAD techniques to measure the distribution of functional unit usage and the micro operation level parallelis...
Ing-Jer Huang, Ping-Huei Xie
DATE
2010
IEEE
118views Hardware» more  DATE 2010»
13 years 10 months ago
Proactive NBTI mitigation for busy functional units in out-of-order microprocessors
Due to fast technology scaling, negative bias temperature instability (NBTI) has become a major reliability concern in designing modern integrated circuits. In this paper, we prese...
Lin Li, Youtao Zhang, Jun Yang 0002, Jianhua Zhao
CASES
2006
ACM
14 years 20 days ago
Cost-efficient soft error protection for embedded microprocessors
Device scaling trends dramatically increase the susceptibility of microprocessors to soft errors. Further, mounting demand for embedded microprocessors in a wide array of safety c...
Jason A. Blome, Shantanu Gupta, Shuguang Feng, Sco...
CDES
2006
101views Hardware» more  CDES 2006»
13 years 10 months ago
Hybrid Error-Detection Approach with No Detection Latency for High-Performance Microprocessors
- Error detection plays an important role in fault-tolerant computer systems. Two primary parameters concerned for error detection are the latency and coverage. In this paper, a ne...
Yung-Yuan Chen, Kuen-Long Leu, Li-Wen Lin
TCAD
2008
167views more  TCAD 2008»
13 years 8 months ago
System-Level Dynamic Thermal Management for High-Performance Microprocessors
Abstract--Thermal issues are fast becoming major design constraints in high-performance systems. Temperature variations adversely affect system reliability and prompt worst-case de...
Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K....