584 search results - page 99 / 117 » Verification-Aware Microprocessor Design |
DSN
2006
IEEE
14 years 1 months ago
2006
IEEE
Protecting the register value and its data buses is crucial to reliable computing in high-performance microprocessors due to the increasing susceptibility of CMOS circuitry to sof...
IEEEPACT
2006
IEEE
14 years 1 months ago
2006
IEEE
Fast instruction decoding is a challenge for the design of CISC microprocessors. A well-known solution to overcome this problem is using a trace cache. It stores and fetches alrea...
ISPASS
2006
IEEE
14 years 1 months ago
2006
IEEE
— Due to the long simulation times of the reference input sets, microarchitects resort to alternative techniques to speed up cycle-accurate simulations. However, the reduction in...
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
Design variability due to die-to-die and within-die process variations has the potential to significantly reduce the maximum operating frequency and the effective yield of high-p...
SAC
2006
ACM
14 years 1 months ago
2006
ACM
Several different techniques and softwares intend to improve the accuracy of results computed in a fixed finite precision. Here we focus on a method to improve the accuracy of ...