385 search results - page 4 / 77 » Verified Code Generation for Embedded Systems |
RSP
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper addresses the need for formal specification and runtime verification of system-level requirements of distributed reactive systems. It describes a formalism for specifyi...
SEUS
2005
IEEE
14 years 2 months ago
2005
IEEE
Source code generators are often applied in embedded systems design to combine the flexibility necessary for reusability with the performance of highly specialized software. Howe...
EMSOFT
2005
Springer
14 years 2 months ago
2005
Springer
Hybrid systems are an appropriate formalism to model embedded systems as they capture the theme of continuous dynamics with discrete control. A simple extension, a network of comm...
CODES
2001
IEEE
14 years 5 days ago
2001
IEEE
Due to rapidly increasing system complexity, shortening time-tomarket, and growing demand for hard real-time systems, formal methods are becoming indispensable in the synthesis of...
FDL
2007
IEEE
14 years 2 months ago
2007
IEEE
SystemVerilog encapsulates both design description and verification properties in one language and provides a unified environment for engineers who have the formidable challenge o...