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» Verifying Correctness of Transactional Memories
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2008
IEEE
91views Hardware» more  DATE 2008»
14 years 1 months ago
Integrating RTL IPs into TLM Designs Through Automatic Transactor Generation
Transaction Level Modeling (TLM) is an emerging design practice for overcoming increasing design complexity. It aims at simplifying the design flow of embedded systems ning and v...
Nicola Bombieri, Nicola Deganello, Franco Fummi
TPHOL
2007
IEEE
14 years 1 months ago
Operational Reasoning for Concurrent Caml Programs and Weak Memory Models
This paper concerns the formal semantics of programming languages, and the specification and verification of software. We are interested in the verification of real programs, wr...
Tom Ridge
EMSOFT
2006
Springer
13 years 10 months ago
Reliability mechanisms for file systems using non-volatile memory as a metadata store
Portable systems such as cell phones and portable media players commonly use non-volatile RAM (NVRAM) to hold all of their data and metadata, and larger systems can store metadata...
Kevin M. Greenan, Ethan L. Miller
CSFW
2002
IEEE
13 years 11 months ago
Security Protocol Design via Authentication Tests
We describe a protocol design process, and illustrate its use by creating ATSPECT, an Authentication Test-based Secure Protocol for Electronic Commerce Transactions. The design pr...
Joshua D. Guttman
AMAST
2008
Springer
13 years 8 months ago
Vx86: x86 Assembler Simulated in C Powered by Automated Theorem Proving
Abstract. Vx86 is the first static analyzer for sequential Intel x86 assembler code using automated deductive verification. It proves the correctness of assembler code against func...
Stefan Maus, Michal Moskal, Wolfram Schulte