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» Verifying Correctness of Transactional Memories
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DATE
2009
IEEE
135views Hardware» more  DATE 2009»
14 years 1 months ago
System-level hardware-based protection of memories against soft-errors
We present a hardware-based approach to improve the resilience of a computer system against the errors occurred in the main memory with the help of error detecting and correcting ...
Valentin Gherman, Samuel Evain, Mickael Cartron, N...
DATE
2010
IEEE
147views Hardware» more  DATE 2010»
13 years 9 months ago
Detecting/preventing information leakage on the memory bus due to malicious hardware
An increasing concern amongst designers and integrators of military and defense-related systems is the underlying security of the individual microprocessor components that make up ...
Abhishek Das, Gokhan Memik, Joseph Zambreno, Alok ...
CAV
2008
Springer
157views Hardware» more  CAV 2008»
13 years 8 months ago
Effective Program Verification for Relaxed Memory Models
Program verification for relaxed memory models is hard. The high degree of nondeterminism in such models challenges standard verification techniques. This paper proposes a new veri...
Sebastian Burckhardt, Madanlal Musuvathi
PODC
2011
ACM
12 years 9 months ago
A nonblocking set optimized for querying the minimum value
We present the Mindicator, a set implementation customized for shared memory runtime systems. The Mindicator is optimized for constant-time querying of its minimum element, while ...
Yujie Liu, Michael F. Spear
EMSOFT
2007
Springer
13 years 10 months ago
Verification of device drivers and intelligent controllers: a case study
The soundness of device drivers generally cannot be verified in isolation, but has to take into account the reactions of the hardware devices. In critical embedded systems, interf...
David Monniaux