1093 search results - page 126 / 219 » Verifying VLSI Circuits |
ICCAD
2003
IEEE
14 years 5 months ago
2003
IEEE
Under modern VLSI technology, process variations greatly affect circuit performance, especially clock skew which is very timing sensitive. Unwanted skew due to process variation f...
ISVLSI
2007
IEEE
14 years 3 months ago
2007
IEEE
Formal verification has become an important step in circuit and system design. A prominent technique is Bounded Model Checking (BMC) which is widely used in industry. In BMC it i...
FCCM
2006
IEEE
14 years 3 months ago
2006
IEEE
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
ISVLSI
2006
IEEE
14 years 2 months ago
2006
IEEE
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
PATMOS
2005
Springer
14 years 2 months ago
2005
Springer
As the number of metal layers and the frequency of VLSI continue to increase, the voltage droop on both the package and vias is becoming more pronounced. This paper analyzes the nu...