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» Verifying VLSI Circuits
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TVLSI
2008
96views more  TVLSI 2008»
13 years 8 months ago
Injection-Locked Clocking: A Low-Power Clock Distribution Scheme for High-Performance Microprocessors
Recently we proposed a new clocking scheme, injection-locked clocking (ILC), to combat deteriorating clock skew and jitter, and hence reduce power consumption in highperformance mi...
Lin Zhang, A. Carpenter, Berkehan Ciftcioglu, Alok...
ICCAD
2009
IEEE
98views Hardware» more  ICCAD 2009»
13 years 6 months ago
GHM: A generalized Hamiltonian method for passivity test of impedance/admittance descriptor systems
A generalized Hamiltonian method (GHM) is proposed for passivity test of descriptor systems (DSs) which describe impedance or admittance input-output responses. GHM can test passi...
Zheng Zhang, Chi-Un Lei, Ngai Wong
VLSID
2005
IEEE
157views VLSI» more  VLSID 2005»
14 years 9 months ago
Energy Efficient Hardware Synthesis of Polynomial Expressions
Polynomial expressions are used to approximate a wide variety of functions commonly found in signal processing and computer graphics applications. Computing these polynomial expre...
Anup Hosangadi, Farzan Fallah, Ryan Kastner
VLSID
2004
IEEE
292views VLSI» more  VLSID 2004»
14 years 9 months ago
NoCGEN: A Template Based Reuse Methodology for Networks on Chip Architecture
In this paper, we describe NoCGEN, a Network On Chip (NoC) generator, which is used to create a simulatable and synthesizable NoC description. NoCGEN uses a set of modularised rou...
Jeremy Chan, Sri Parameswaran
VLSID
2004
IEEE
120views VLSI» more  VLSID 2004»
14 years 9 months ago
Dynamic Power Optimization of Interactive Systems
Abstract-- Power has become a major concern for mobile computing systems such as laptops and handhelds, on which a significant fraction of software usage is interactive instead of ...
Lin Zhong, Niraj K. Jha