Sciweavers

1093 search results - page 193 / 219
» Verifying VLSI Circuits
Sort
View
LCN
2003
IEEE
14 years 25 days ago
An Optoelectronic Multi-Terabit CMOS Switch Core for Local Area Networks
Optoelectronic integrated circuits can support thousands of integrated optical laser diodes and photodetectors bonded to a high-performance CMOS substrate, and can be used in the ...
Honglin Wu, Amir Gourgy, Ted H. Szymanski
ISLPED
2003
ACM
85views Hardware» more  ISLPED 2003»
14 years 24 days ago
Energy recovery clocking scheme and flip-flops for ultra low-energy applications
A significant fraction of the total power in highly synchronous systems is dissipated over clock networks. Hence, low-power clocking schemes would be promising approaches for futu...
Matthew Cooke, Hamid Mahmoodi-Meimand, Kaushik Roy
ISLPED
2003
ACM
113views Hardware» more  ISLPED 2003»
14 years 24 days ago
Reducing power density through activity migration
Power dissipation is unevenly distributed in modern microprocessors leading to localized hot spots with significantly greater die temperature than surrounding cooler regions. Exc...
Seongmoo Heo, Kenneth C. Barr, Krste Asanovic
CASES
2009
ACM
14 years 7 days ago
Complete nanowire crossbar framework optimized for the multi-spacer patterning technique
Nanowire crossbar circuits are an emerging architectural paradigm that promises a higher integration density and an improved fault-tolerance due to its reconfigurability. In this...
M. Haykel Ben Jamaa, Gianfranco Cerofolini, Yusuf ...
ASPDAC
2000
ACM
111views Hardware» more  ASPDAC 2000»
13 years 12 months ago
Gate-level aged timing simulation methodology for hot-carrier reliability assurance
- This paper presents a new aged timing simulation methodology that can be used for hot-carrier reliability assurance of VLSI. This methodology consists of a compact model and a un...
Yoshiyuki Kawakami, Jingkun Fang, Hirokazu Yonezaw...