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» Verifying VLSI Circuits
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GLVLSI
2005
IEEE
125views VLSI» more  GLVLSI 2005»
14 years 2 months ago
Low-power circuits using dynamic threshold devices
We present simulations for ultra-thin body, fully-depleted, double-gate (DG) silicon-on-insulator (SOI) devices that can be readily optimized for both static power loss and perfor...
Paul Beckett
CJ
2010
80views more  CJ 2010»
13 years 8 months ago
Verifying a Synthesized Implementation of IEEE-754 Floating-Point Exponential Function using HOL
rder logic (HOL) theorem prover. The high ability of abstraction in the HOL verification system allows its use for the verification task over the whole design path of the circuit, ...
Behzad Akbarpour, Amr T. Abdel-Hamid, Sofiè...
GLVLSI
2006
IEEE
112views VLSI» more  GLVLSI 2006»
14 years 2 months ago
A design methodology for temperature variation insensitive low power circuits
Operating an integrated circuit at the prescribed nominal supply voltage is not preferable for reliable circuit operation under temperature fluctuations. A design methodology base...
Ranjith Kumar, Volkan Kursun
GLVLSI
2003
IEEE
219views VLSI» more  GLVLSI 2003»
14 years 2 months ago
Buffer sizing for minimum energy-delay product by using an approximating polynomial
This paper first presents an accurate and efficient method of estimating the short circuit energy dissipation and the output transition time of CMOS buffers. Next the paper descri...
Chang Woo Kang, Soroush Abbaspour, Massoud Pedram
ISLPED
2003
ACM
149views Hardware» more  ISLPED 2003»
14 years 2 months ago
Elements of low power design for integrated systems
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...
Sung-Mo Kang