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» Verifying VLSI Circuits
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VLSID
2010
IEEE
181views VLSI» more  VLSID 2010»
14 years 19 days ago
Parametric Fault Diagnosis of Nonlinear Analog Circuits Using Polynomial Coefficients
We propose a method for diagnosis of parametric faults in analog circuits using polynomial coefficients of the circuit model [15]. As a sequel to our recent work [14], where circ...
Suraj Sindia, Virendra Singh, Vishwani D. Agrawal
GLVLSI
2003
IEEE
194views VLSI» more  GLVLSI 2003»
14 years 2 months ago
RF CMOS circuit optimizing procedure and synthesis tool
In this paper, we discuss a methodology to design and synthesize analog CMOS components such as RF amplifiers. The inputs of the synthesis tool are the circuit specifications desc...
Chandrasekar Rajagopal, Karthik Sridhar, Adrian Nu...
DAC
2009
ACM
14 years 1 months ago
GPU-based parallelization for fast circuit optimization
The progress of GPU (Graphics Processing Unit) technology opens a new avenue for boosting computing power. This work is an attempt to exploit GPU for accelerating VLSI circuit opt...
Yifang Liu, Jiang Hu
ISVLSI
2008
IEEE
136views VLSI» more  ISVLSI 2008»
14 years 3 months ago
CMOS Control Enabled Single-Type FET NASIC
A new hybrid CMOS-nanoscale circuit style has been developed that uses only one type of Field Effect Transistor (FET) in the logic portions of a design. This is enabled by CMOS pro...
Pritish Narayanan, Michael Leuchtenburg, Teng Wang...
GLVLSI
2003
IEEE
167views VLSI» more  GLVLSI 2003»
14 years 2 months ago
New approach to CMOS current reference with very low temperature coefficient
A novel CMOS current reference circuit with very low temperature coefficient is realized, by compensating the temperature performance of the resistor. This circuit gives out a cur...
Jiwei Chen, Bingxue Shi