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GECCO
2004
Springer
125views Optimization» more  GECCO 2004»
14 years 2 months ago
An Island-Based GA Implementation for VLSI Standard-Cell Placement
Genetic algorithms require relatively large computation time to solve optimization problems, especially in VLSI CAD such as module placement. Therefore, island-based parallel GAs a...
Guangfa Lu, Shawki Areibi
ISMVL
2003
IEEE
101views Hardware» more  ISMVL 2003»
14 years 2 months ago
Bidirectional Data Transfer Based Asynchronous VLSI System Using Multiple-Valued Current Mode Logic
A new asynchronous data transfer scheme using multiple-valued 2-color 1-phase coding, called a bidirectional data transfer scheme, is proposed for a highperformance and low-power ...
Takahiro Hanyu, Tomohiro Takahashi, Michitaka Kame...
ISPD
1998
ACM
244views Hardware» more  ISPD 1998»
14 years 1 months ago
Analysis, reduction and avoidance of crosstalk on VLSI chips
As chip size and design density increase, coupling effects (crosstalk) between signal wires become increasingly critical to on–chip timing and even functionality. A method is pr...
Tilmann Stöhr, Markus Alt, Asmus Hetzel, J&uu...
DAC
1997
ACM
14 years 29 days ago
Multilevel Hypergraph Partitioning: Application in VLSI Domain
In this paper, we present a new hypergraph partitioning algorithm that is based on the multilevel paradigm. In the multilevel paradigm, a sequence of successively coarser hypergra...
George Karypis, Rajat Aggarwal, Vipin Kumar, Shash...
TCAD
2008
119views more  TCAD 2008»
13 years 8 months ago
FLUTE: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm for VLSI Design
Abstract-- In this paper, we present a very fast and accurate rectilinear Steiner minimal tree (RSMT) algorithm called FLUTE. FLUTE is based on pre-computed lookup table to make RS...
Chris C. N. Chu, Yiu-Chung Wong