1093 search results - page 74 / 219 » Verifying VLSI Circuits |
GLVLSI
2003
IEEE
14 years 3 months ago
2003
IEEE
One of the fundamental problems in Deep Sub Micron (DSM) circuits is Simultaneous Switching Noise (SSN), which causes voltage fluctuations in the circuit power/ground networks. In...
ISVLSI
2005
IEEE
14 years 3 months ago
2005
IEEE
In this paper, we propose Boost Logic, a logic family which relies on voltage scaling, gate overdrive and energy recovery techniques to achieve high energy efficiency at frequenc...
ICCAD
1996
IEEE
14 years 2 months ago
1996
IEEE
-- In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due toincreasing operating...
VLSID
2002
IEEE
14 years 10 months ago
2002
IEEE
This paper presents a novel approach for the synthesis of dynamic CMOS circuits using Domino and Nora styles. As these logic styles can implement only non-inverting logic, convent...
ICCAD
2004
IEEE
14 years 6 months ago
2004
IEEE
To ensure the power and signal integrity of modern VLSI circuits, it is crucial to analyze huge amount of nonlinear devices together with enormous interconnect and even substrate ...