Sciweavers

222 search results - page 18 / 45
» Verifying an Arbiter Circuit
Sort
View
EH
1999
IEEE
125views Hardware» more  EH 1999»
14 years 7 days ago
Improving Correctness of Finite-State Machine Synthesis from Multiple Partial Input/Output Sequences
Our previous work focused on the synthesis of sequential circuits based on a partial input/output sequence. As the behavioural description of the target circuit is not known the c...
Prabhas Chongstitvatana, Chatchawit Aporntewan
PATMOS
2005
Springer
14 years 1 months ago
Power - Performance Optimization for Custom Digital Circuits
This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to max...
Radu Zlatanovici, Borivoje Nikolic
ACSD
2006
IEEE
89views Hardware» more  ACSD 2006»
13 years 11 months ago
On process-algebraic verification of asynchronous circuits
Asynchronous circuits have received much attention recently due to their potential for energy savings. Process algebras have been extensively used in the modelling, analysis and sy...
Xu Wang, Marta Z. Kwiatkowska
CHES
2006
Springer
146views Cryptology» more  CHES 2006»
13 years 11 months ago
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits
This paper presents a Path Swapping (PS) method which enables to enhance the security of Quasi Delay Insensitive Asynchronous Circuits against Power Analysis (PA) attack. This appr...
G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin
DATE
2008
IEEE
102views Hardware» more  DATE 2008»
14 years 2 months ago
A New Approach for Combining Yield and Performance in Behavioural Models for Analogue Integrated Circuits
A new algorithm is presented that combines performance and variation objectives in a behavioural model for a given analogue circuit topology and process. The tradeoffs between per...
Sawal Ali, Reuben Wilcock, Peter R. Wilson, Andrew...