717 search results - page 59 / 144 » Virtual Circuit Switching |
VLSID
2007
IEEE
14 years 8 months ago
2007
IEEE
As technology scales to 40nm and beyond, intra-die process variability will cause large delay and leakage variations across a chip in addition to expected die-to-die variations. I...
3DIC
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—Modeling parasitic parameters of Through-SiliconVia (TSV) structures is essential in exploring electrical characteristics such as delay and signal integrity (SI) of circ...
CHES
2004
Springer
14 years 1 months ago
2004
Springer
Dual-rail encoding, return-to-spacer protocol and hazard-free logic can be used to resist differential power analysis attacks by making the power consumption independent of process...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
Power gating has been widely used to reduce subthreshold leakage. However, its efficiency degrades very fast with technology scaling due to the gate leakage of circuits specific t...
FMCAD
2007
Springer
13 years 11 months ago
2007
Springer
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates verifying digital circuits using contin...