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ISQED
2008
IEEE
98views Hardware» more  ISQED 2008»
14 years 3 months ago
Design Margin Exploration of Spin-Torque Transfer RAM (SPRAM)
We proposed a combined magnetic and circuit level technique to explore the design methodology of SpinTorque Transfer RAM (SPRAM). A dynamic magnetic model of magnetic tunneling ju...
Yiran Chen, Xiaobin Wang, Hai Li, Harry Liu, Dimit...
ICON
2007
IEEE
14 years 3 months ago
Erlang B as a Performance Model for IP Flows
— Flow-based networking has gained momentum in the research community in recent years. It allows improved performance guarantees and dynamic, load-aware routing. Flowbased networ...
Alexander A. Kist
ISCAS
2007
IEEE
103views Hardware» more  ISCAS 2007»
14 years 3 months ago
Hopf-Type Intermediate-Scale Bifurcation in Single-Stage Power-Factor-Correction Power Supplies
— This paper reports intermediate-scale instability in a single-stage power-factor-correction (PFC) power supply that employs a cascade configuration of a boost stage operating ...
Dong Dai, Shengnan Li, Xikui Ma, Chi K. Michael Ts...
ISCAS
2007
IEEE
120views Hardware» more  ISCAS 2007»
14 years 3 months ago
Clock Gating and Negative Edge Triggering for Energy Recovery Clock
Energy recovery clocking has been demonstrated as an effective method for reducing the clock power. In this method the conventional square wave clock signal is replaced by a sinus...
Vishwanadh Tirumalashetty, Hamid Mahmoodi
DATE
2006
IEEE
89views Hardware» more  DATE 2006»
14 years 3 months ago
Automatic insertion of low power annotations in RTL for pipelined microprocessors
We propose instruction-driven slicing, a new technique for annotating microprocessor descriptions at the Register Transfer Level (RTL) in order to achieve lower power dissipation....
Vinod Viswanath, Jacob A. Abraham, Warren A. Hunt ...