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ISCAS
2005
IEEE
185views Hardware» more  ISCAS 2005»
14 years 2 months ago
2 GHz 8-bit CMOS ROM-less direct digital frequency synthesizer
—This paper presents a 2GHz 8-bit CMOS ROM-less direct digital frequency synthesizer (DDFS). Nonlinear current steering digital to analog converter (DAC) has been utilized to con...
Xuefeng Yu, Foster F. Dai, Yin Shi, Ronghua Zhu
ISQED
2005
IEEE
95views Hardware» more  ISQED 2005»
14 years 2 months ago
Simulating and Improving Microelectronic Device Reliability by Scaling Voltage and Temperature
The purpose of this work is to explore how device operation parameters such as switching speed and power dissipation scale with voltage and temperature. We simulated a CMOS ring o...
Xiaojun Li, Joerg D. Walter, Joseph B. Bernstein
ISQED
2003
IEEE
104views Hardware» more  ISQED 2003»
14 years 2 months ago
Elimination of false aggressors using the functional relationship for full-chip crosstalk analysis
As the portion of coupling capacitance increases in smaller process geometries, accurate coupled noise analysis is becoming more important in current design methodologies. We prop...
Jae-Seok Yang, Jeong-Yeol Kim, Joon-Ho Choi, Moon-...
ISQED
2003
IEEE
102views Hardware» more  ISQED 2003»
14 years 2 months ago
Modeling Crosstalk Induced Delay
The amplitude of coupled noise is often used in estimating the crosstalk effect. Coupling noise-induced delay measures the impact of crosstalk on circuit performance. Efficient c...
Chung-Kuan Tsai, Malgorzata Marek-Sadowska
DFT
2002
IEEE
103views VLSI» more  DFT 2002»
14 years 1 months ago
Input Ordering in Concurrent Checkers to Reduce Power Consumption
A novel approach for reducing power consumption in checkers used for concurrent error detection is presented. Spatial correlations between the outputs of the circuit that drives t...
Kartik Mohanram, Nur A. Touba