Fast runtime reconfigurable hardware enables system designers to swap hardware into and out of an FPGA much as the pages of virtual memory are swapped into and out of virtual memor...
Don Davis, Michael Barr, Toby Bennett, Stephen Edw...
Concurrent verification of hardware and software as part of the development process can shorten the time to market of complex systems. The objectives of the Virtual CPU approach i...
Abstract-- We have continued development of Optically Reconfigurable Gate Arrays (ORGAs) to realize larger virtual gate count VLSIs than currently available VLSIs. The grain and st...
The paper presents LOCO-Analyst, an educational tool for providing teachers with feedback on the relevant aspects of the learning process taking place in a web-based learning envir...
Jelena Jovanovic, Dragan Gasevic, Christopher A. B...
Current networked society present learners with challenges that cannot be sufficiently coped with in educational contexts that are characterized by transmission or participation ep...