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DAC
2005
ACM
14 years 8 months ago
Multilevel full-chip routing for the X-based architecture
As technology advances into the nanometer territory, the interconnect delay has become a first-order effect on chip performance. To handle this effect, the X-architecture has been...
Tsung-Yi Ho, Chen-Feng Chang, Yao-Wen Chang, Sao-J...
CODES
2005
IEEE
14 years 1 months ago
System-level design automation tools for digital microfluidic biochips
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
Krishnendu Chakrabarty, Fei Su
VRML
2003
ACM
14 years 1 months ago
3D virtual clothing: from garment design to web3d visualization and simulation
One of the major challenges in Computer Graphics concerns the 3D representation and physically-based simulation of garments. In our research, we are working closely with the texti...
Luca Chittaro, Demis Corvaglia
DAC
2006
ACM
14 years 8 months ago
Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction
Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
Yu Hu, Yan Lin, Lei He, Tim Tuan
SIGGRAPH
1997
ACM
13 years 12 months ago
Interactive Boolean operations for conceptual design of 3-D solids
Interactive modeling of 3-D solids is an important and difficult problem in computer graphics. The Constructive Solid Geometry (CSG) modeling scheme is highly attractive for inte...
Ari Rappoport, Steven N. Spitz