254 search results - page 10 / 51 » Weaving Relations for Cache Performance |
ISCA
2000
IEEE
14 years 1 months ago
2000
IEEE
For many applications, branch mispredictions and cache misses limit a processor’s performance to a level well below its peak instruction throughput. A small fraction of static i...
SUTC
2010
IEEE
14 years 18 days ago
2010
IEEE
— Extensive research has been performed to study selfish data caching in ad hoc networks using game-theoretic analysis. However, due to the caching problem’s theoretical root ...
ICCD
2005
IEEE
14 years 5 months ago
2005
IEEE
Cache memories are commonly implemented through multiple memory banks to improve bandwidth and latency. The early knowledge of the data cache bank that an instruction will access ...
HPDC
2005
IEEE
14 years 2 months ago
2005
IEEE
Parallel file subsystems in today’s high-performance computers adopt many I/O optimization strategies that were designed for distributed systems. These strategies, for instance...
CASES
2006
ACM
14 years 2 months ago
2006
ACM
We propose an architecture that uses NAND flash memory to reduce main memory power in web server platforms. Our architecture uses a two level file buffer cache composed of a re...