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IPPS
2006
IEEE
14 years 3 months ago
Parallel FPGA-based all-pairs shortest-paths in a directed graph
With rapid advances in VLSI technology, Field Programmable Gate Arrays (FPGAs) are receiving the attention of the Parallel and High Performance Computing community. In this paper,...
Uday Bondhugula, Ananth Devulapalli, Joseph Fernan...
ISQED
2007
IEEE
236views Hardware» more  ISQED 2007»
14 years 4 months ago
3DFFT: Thermal Analysis of Non-Homogeneous IC Using 3D FFT Green Function Method
Due to the roaring power dissipation and gaining popularity of 3D integration, thermal dissipation has been a critical concern of modern VLSI design. The availability for chip-lev...
Dongkeun Oh, Charlie Chung-Ping Chen, Yu Hen Hu
JPDC
2006
134views more  JPDC 2006»
13 years 9 months ago
Fast shared-memory algorithms for computing the minimum spanning forest of sparse graphs
Minimum Spanning Tree (MST) is one of the most studied combinatorial problems with practical applications in VLSI layout, wireless communication, and distributed networks, recent ...
David A. Bader, Guojing Cong
IPPS
2006
IEEE
14 years 3 months ago
Parallel genetic algorithm for SPICE model parameter extraction
Models of simulation program with integrated circuit emphasis (SPICE) are currently playing a central role in the connection between circuit design and chip fabrication communitie...
Yiming Li, Yen-Yu Cho
GLVLSI
2005
IEEE
67views VLSI» more  GLVLSI 2005»
14 years 3 months ago
Energy recovery clocked dynamic logic
Energy recovery clocking results in significant energy savings in clock distribution networks as compared to conventional squarewave clocking. However, since energy recovery clock...
Matthew Cooke, Hamid Mahmoodi-Meimand, Qikai Chen,...