Soft errors have emerged as an important reliability challenge for nanoscale VLSI designs. In this paper, we present a fast and efficient soft error rate (SER) computation algorit...
Rajeev R. Rao, Kaviraj Chopra, David Blaauw, Denni...
Abstract— Routing tree construction is a fundamental problem in modern VLSI design. In this paper we propose CDCTree, an Obstacle-Avoiding Rectilinear Steiner Minimum Tree (OARSM...
Yiyu Shi, Tong Jing, Lei He, Zhe Feng 0002, Xianlo...
Defect and fault tolerance is being studied in a 3D Heterogeneous Sensor using a stacked chip with sensors located on the top plane, and inter-plane vias connecting these to other...
- A closed form expression for the propagation delay of a CMOS gate driving a distributed RLC line is introduced that is within 5% of dynamic circuit simulations for a wide range o...
Service address routing is introduced as a novel and powerful paradigm for the integration of resource management functions into the interconnection fabric of cluster computers. S...
Isaac D. Scherson, Daniel S. Valencia, Enrique Cau...